We work on the full path: the algorithm, the architecture that makes it cheap enough to run, and the FPGA or SoC prototype that proves it over the air. Four threads run through everything.
Joint radar–communication transceivers, mmWave front-ends and reconfigurable radar accelerators for 3D localisation.
Deep-learning-augmented channel estimation, in-memory compute for sensors and compute-efficient online learning at the edge.
Flexible 5G/6G physical layers on Zynq SoC and RFSoC — adaptive OFDM, OTFS estimation and NavIC accelerators.
Wideband sensing, sub-Nyquist sampling and automatic modulation classification for emitters in contested spectrum.