Our research focuses on the co-design of efficient algorithms and reconfigurable hardware architectures for next-generation wireless communication, radar sensing, and edge AI systems. The Algorithms to Architecture (A2A) group is distinguished by its emphasis on real-time hardware realization — translating theoretical designs into working FPGA- and SoC-based testbeds and SDR platforms — an approach that has been validated through funding from government and industry along with award-winning demonstrations at leading conferences such as VLSID, APCCAS, and COMSNETS.
Currently Dean of Academic Affairs at IIIT-Delhi since 2023. Previously CentraleSupélec, NTU Singapore, and consultant to VVDN, Apexplus and Arka Aerospace.
Joint radar–communication waveforms and the reconfigurable front-ends that run them in real time.
Quantised, hardware-aware learning accelerators that fit the power budget of a deployed node.
5G/6G physical-layer blocks on FPGA and RFSoC, from filter banks to full transceiver chains.
Wideband spectrum sensing, emitter identification and de-interleaving for contested environments.
Sumit J. Darak received his B.E. in Electronics and Communication Engineering from Pune University in 2007 and his Ph.D. from Nanyang Technological University, Singapore, in 2013. He is Professor and Dean of Academic Affairs at IIIT-Delhi, and was previously a postdoctoral researcher at CentraleSupélec, France.
Alongside academia he has consulted on 5G with VVDN Technologies, on SoC design with Apexplus Technologies, and on radar systems with Arka Aerospace.
Full biography & employment timeline →